000			01062cam a22002294a 4500
001			vtls000003708
003			VRT
005			20250102222444.0
008			081228s2005 gw a |b 101 0 eng
020			_a9783540290131
039		9	_a202311201156 _bakushoob _c202311151206 _dakushoob _c201402040119 _dVLOAD _c201308041417 _dalawaid _y200812280934 _zNoora
050	0	0	_aTK7874.75 _b.P38 2005
245	1	0	_aIntegrated circuit and system design : _bpower and timing modeling, optimization and simulation : 15th international workshop, PATMOS 2005, Leuven, Belgium, September 20-23, 2005 : proceedings / _cVassilis Paliouras, Johan Vounckx, Diederik Verkest (eds.).
246	3	0	_aPATMOS 2005
260			_aBerlin : _bSpringer, _cc2005.
300			_axv, 753 p. : _bill. ; _c24 cm.
440		0	_aLecture notes in computer science, _9767
500			_aElectronic book available via Springer Link.
504			_aIncludes bibliographical references and index.
650		0	_aIntegrated circuits _xVery large scale integration _xComputer-aided design _91919
942			_2lcc _n0 _cBK
999			_c600 _d600