Low-Power Low-Voltage Sigma-Delta Modulators in Nanometer CMOS / (Record no. 690)

MARC details
000 -LEADER
fixed length control field 03777nam a2200265 a 4500
001 - CONTROL NUMBER
control field vtls000004429
003 - CONTROL NUMBER IDENTIFIER
control field VRT
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20250102222449.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 090203 | 000 0 eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 140204139X
039 #9 - LEVEL OF BIBLIOGRAPHIC CONTROL AND CODING DETAIL [OBSOLETE]
Level of rules in bibliographic description 201402040125
Level of effort used to assign nonsubject heading access points VLOAD
Level of effort used to assign subject headings 201007311049
Level of effort used to assign classification malmash
Level of effort used to assign subject headings 200902030959
Level of effort used to assign classification venkatrajand
Level of effort used to assign subject headings 200902030958
Level of effort used to assign classification venkatrajand
-- 200902030956
-- venkatrajand
050 ## - LIBRARY OF CONGRESS CALL NUMBER
Classification number TK7887.6
Item number .Y36 2006
100 1# - MAIN ENTRY--PERSONAL NAME
Personal name Yao, Libin
9 (RLIN) 2152
245 1# - TITLE STATEMENT
Title Low-Power Low-Voltage Sigma-Delta Modulators in Nanometer CMOS /
Statement of responsibility, etc. by Libin Yao, Michiel Steyaert and Willy Sansen
260 ## - PUBLICATION, DISTRIBUTION, ETC.
Place of publication, distribution, etc. Netherlands. :
Name of publisher, distributor, etc. Springer,
Date of publication, distribution, etc. c2006.
300 ## - PHYSICAL DESCRIPTION
Extent xxiii, 158 p. :
Other physical details ill. ;
Dimensions 24 cm.
500 ## - GENERAL NOTE
General note Includes Bibliography and index.
505 ## - FORMATTED CONTENTS NOTE
Formatted contents note Abstract Contents List of Tables List of Figures Symbols and Abbreviations Physical Definitions 1 Introduction 1.1 Motivation 1.2 Outline of the work 2 ADCs in Deep-Submicron CMOS Technologies 2.1 Introduction 2.2 Scaling-Down of CMOS Technologies 2.2.1 Driving Force of the CMOS Scaling-Down 2.2.2 Moving Into Deep-Submicron CMOS Technologies 2.3 Impact of Moving Into Deep-Submicron CMOS to Analog Circuits 2.3.1 Decreased Supply Voltage 2.3.2 Impact on Transistor Intrinsic Gain 2.3.3 Impact on Device Matching 2.3.4 Impact on Device Noise 2.4 ADCs In Deep-Submicron CMOS 2.4.1 Decreased Signal Swing 2.4.2 Degraded Transistor Characteristics 2.4.3 Distortion 2.4.4 Switch Driving 2.4.5 Improved Device Matching 2.4.6 Digital Circuits Advantages 2.5 Conclusion 3 Principle of sigma-delta ADC 3.1 Introduction 3.2 Basic Analog to Digital Conversion 3.3 Oversampling and Noise Shaping 3.3.1 Oversampling 3.3.2 Noise Shaping 3.3.3 sigma-delta modulator 3.3.4 PerformanceMetrics for the sigma-delta ADC 3.4 Traditional sigma-delta ADC Topology 3.4.1 Single-Loop Single-Bit sigma-delta Modulators 3.4.2 Single-Loop Multibit sigma-delta Modulators 3.4.3 Cascaded sigma-delta Modulators 3.5 Conclusion 4 Low-Power Low-Voltage sigma-delta ADC Design in Deep-Submicron CMOS: Circuit Level Approach 4.1 Introduction 4.2 Low-Voltage Low-Power OTA Design 4.2.1 Gain Enhanced Current Mirror OTA Design 4.2.2 A Test Gain-Enhanced Current Mirror OTA 4.2.3 Implementation and Measurement Results 4.2.4 Two-Stage OTA Design 4.3 Low-Voltage Low-Power sigma-delta ADC Design 4.3.1 Impact of Circuit Nonidealities to sigma-delta ADC Performance 4.3.2 Modulator Topology Selection 4.3.3 OTA Topology Selection 4.3.4 Transistor Biasing 4.3.5 Scaling of Integrators 4.4 A 1-V 140- Wsigma-delta modulator in 90-nm CMOS 4.4.1 Building Block Circuits Design 4.4.2 Implementation 4.4.3 Measurement Results 4.5 Measurements on PSRR and Low-Frequency Noise Floor 4.5.1 I
520 ## - SUMMARY, ETC.
Summary, etc. Low-Power Low-Voltage Sigma-Delta Modulators in Nanometer CMOS addresses the low-power low-voltage Sigma-Delta ADC design in nanometer CMOS technologies at both the circuit-level and the system level. The low-power low-voltage Sigma-Delta modulator design at the circuit level is introduced. A design example is presented in this book. This design is the first published Sigma-Delta design in a 90-nm CMOS technology and reaches a very high figure-of-merit. At the system level, a novel systematic study on the full feedforward Sigma-Delta topology is presented in this book. As a design example, a fourth-order single-loop full feedforward Sigma-Delta modulator design in a 130-nm pure digital CMOS technology is presented. This design is the first design using the full feedforward Sigma-Delta topology and reaches the highest conversion speed among all the 1-V Sigma-Delta modulators to date.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Analog-to-digital converters
9 (RLIN) 2153
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Modulators (Electronics)
9 (RLIN) 2154
700 0# - ADDED ENTRY--PERSONAL NAME
Personal name Steyaert, Michiel, 1959-
9 (RLIN) 2155
700 0# - ADDED ENTRY--PERSONAL NAME
Personal name Sansen, Willy M. C
9 (RLIN) 2156
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Source of classification or shelving scheme Library of Congress Classification
Suppress in OPAC No
Koha item type Books
Holdings
Withdrawn status Lost status Source of classification or shelving scheme Damaged status Not for loan Home library Current library Shelving location Date acquired Total checkouts Full call number Barcode Date last seen Copy number Price effective from Koha item type
    Library of Congress Classification     Library Library First Floor 21/12/2024   TK7887.6 .Y36 2006 8972 21/12/2024 1 21/12/2024 Books
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